The AT32F456 series is based on ARM® Cortex®-M4 32-bit core operating at a frequency of up to 192 MHz. This device features a single-precision floating point unit (FPU), digital signal processor (DSP), up to 512 KB Flash memory and 128+16 KB SRAM. It also embeds a 26 KB programmable boot memory - configurable as a Bootloader or as one-time-programmable user instruction and data memory. The latter option can extend Flash memory up to 512+26 KB.

In addition, the device offers a rich choice of peripherals and advanced I/O ports, including up to 3x I2Cs, 4x SPIs/I2Ss(2x full-duplex), 1x full-duplex I2SF, 8x USARTs, 3x CAN-FDs(compatible with CAN 2.0B, at a higher communication rate), 1x SDIO, 1x OTGFS, 1x QSPI interface for supporting external SPI memory or SPI RAM, and 1x XMC interface that supports SDRAM, SRAM, PSRAM, NOR Flash, and other memory extensions. Additionally, it features 2x 12-bit 16-channel high-speed 5.33Msps ADCs, 2x 12-bit DACs, 8x 16-bit general-purpose timers, 2x 32-bit general-purpose timers, 2x basic timers, 1x AES hardware accelerator, and 1x TRNG. All these features are designed to enhance code and data protection while ensuring high performance.

More importantly, the devices in the entire AT32F456 series are fully pin-to-pin compatible with each other and thus can significantly shorten application development cycles. They are suitable for various applications such as industrial automation, motor control, Internet of Things (IoT), consumer electronics, among others.

Key Features

· Performance

- ARM® Cortex®-M4 MCU up to 192 MHz

- Single precision floating-point unit (FPU)

- DSP instructions

- 2.4 to 3.6 V operating supply

- Almost I/Os 5 V tolerant

- Temperature range -40 to + 105 °C

· Memories

- 512 Kbytes of Flash memory

- 128+16 Kbytes of SRAM

- 4 Kbytes of OTP memory

- sLib: configurable part of main Flash set as a library area with code executable but secured, non-readable

- 1 x XMC: supports SRAM, PSRAM, NOR and SDRAM memories

- 1 x QSPIs, scalable Flash memory or RAM, address mapping support

· Clock

- PLL (192 MHz output)

- 4 to 25 MHz crystal oscillator (HEXT)

- 48 MHz internal factory-trimmed high speed clock (HICK) with ±1% accuracy at TA=25 °C and ±2.5% at TA= -40°C to +105°C, with automatic clock calibration (ACC)

- 32 kHz crystal oscillator (LEXT)

- Low speed internal clock (LICK)

· Reset and supply management

- Low power modes: Sleep, Deepsleep and Standby modes (wake up via 6 WKUP pins)

- Power-on reset (POR), low voltage reset (LVR), and power voltage monitoring (PVM)

- 20 x 32-bit battery powered registers (BPR)

· Analog peripherals

- 2 x 12-bit 5.33 Msps A/D converters (up to 16 channels)

- 2 x 12-bit D/A converters

· ERTC: enhanced RTC with auto-wakeup, alarm, subsecond accuracy, and hardware calendar with calibration feature

· Timers

- 2 x 16-bit 8-channel advanced timers

- 2 x 32-bit and 8 x 16-bit general-purpose timers

- 2 x 16-bit basic timers

- 2 x watchdog timers (general WDT and windowed WWDT)

- SysTick timer: a 24-bit downcounter

· Communication interfaces

- 3 x I²C interfaces for SMBus/PMBus support

- Up to 4 x SPI interfaces (40 Mbit/s), all with multiplexed half-duplex I²S, and I²S2/I²S3 full-duplex mode

- 1 x independent full-duplex I²S interface(I²SF)

- Up to 8 x USARTs (with ISO7816 interface, LIN, IrDA and modem control)

- Up to 3 x CAN-FD interfaces

- 1 x OTGFS interface (crystal-less in device mode)

- 1 x SDIO interface

- Infrared transmitter (IRTMR)

· DMA

- 2 x 7-channel DMA controllers for flexible mapping

· Fast I/O ports

- Up to 117 I/O ports, all mappable on 16 external interrupts and almost all 5 V-tolerant

- All fast I/Os, control registers accessible with fᴀʜʙ speed

· XMC

- supports SRAM, PSRAM, NOR and SDRAM memories

- Supports LCD parallel interface, 8080/6800 modes

· AES hardware acceletator: Support for cipher key lengths of 256/192/128-bit

· True random number generator

· Packages

- QFN48 6 x 6 mm

- LQFP48 7 x 7 mm

- LQFP64 10 x 10 mm

- LQFP100 14 x 14 mm

- LQFP144 20 x 20 mm